vps_chatr_ceiling man page on HP-UX

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vps_chatr_ceiling(5)					  vps_chatr_ceiling(5)

NAME
       vps_chatr_ceiling - maximum (in kilobytes) of user selectable page size

VALUES
   Default
   Allowed values
       Minimum:

       Maximum:

DESCRIPTION
       The Translation Look-aside Buffer (TLB) is a microprocessor feature for
       virtual memory, where the  most	recent	physical  to  virtual  address
       translations are cached, in the expectation that these translations are
       likely to be needed again soon.	This is based  on  the	principles  of
       spatial	and temporal locality of address references in programs.  His‐
       torically, the TLB was entirely	managed	 within	 hardware  to  achieve
       speed  optimizations  while  sacrificing	 the  flexibility  of software
       implementations, for example, easily changed algorithms or table imple‐
       mentations.

       In  recent  years,  the flexibility of a software implementation of the
       TLB has regained importance over pure  hardware	speed.	 Specifically,
       the idea of logical grouping of physical frames (whose size is fixed in
       hardware) into "superpages" or "large pages", which can be  represented
       in  software TLB algorithms using a single base address translation for
       many physical frames, significantly reduces the lost cycles due to page
       faults assuming reasonable spatial and temporal locality.  For example,
       consider a scientific application working on an array where  each  ele‐
       ment  requires  1K  of memory.  Using the usual 4K physical frame size,
       and referencing	the  array  sequentially  causes  a  page  fault  that
       requires	 the page be read into memory from disk or swap, and loads the
       TLB with the frame base address translation every fifth element.

       The tunable parameter sets the upper bound for  virtual	page  size  on
       files  that a user specifies, through or any programmatic interfaces or
       other mechanisms.  (Programmatic interface refers to an interface  that
       can be called from a program.)

       Originally,  this tunable was created to set an upper bound for virtual
       page size set by the user through the command on the binary.  Hence the
       parameter name (where "vps" refers to variable page size).

   Who is Expected to Change This Tunable?
       Anyone.

   Restrictions on Changing
       Changes	to this tunable take effect for any subsequent physical memory
       allocations. It does not affect any physical memory  that  has  already
       been allocated.

   When Should the Value of This Tunable Be Raised?
       This  tunable  should be raised when a user application, or in general,
       the system with known large memory set usage (such as  a	 database)  is
       expected to need larger pages than the current value allows.

   What Are the Side Effects of Raising the Value?
       The  side  effects  depend on the actual memory usage in the system and
       whether large page sizes are used indiscriminately, that	 is,  with  no
       performance  justification.   In	 the first case, mistakenly indicating
       that an application use a large page size (512 MB or more, for example)
       when the application accesses memory in a sparse pattern, or has a much
       smaller working set, in general.	 For example, an  application  uses  a
       shell  script  which  only needs 64 KB of memory total, or a scientific
       sparse array analysis program that works on large data sets,  but  only
       on  very	 small portions of the data, where the rest can be swapped out
       or not even allocated.  Setting this value for the application  results
       in  several frames of physical memory being wasted, because if any of a
       virtual large page is in core memory, then all of it  must  be  loaded.
       This  could  potentially lead to unnecessary pageouts and pageins, that
       is, excessive disk activity, leading to performance degradation.

       In the second case, where several users request large  page  sizes  for
       their  application  for	no good reason, keeping this tunable low mini‐
       mizes the performance hit on the rest of the system.

       Modern architectures support very large page sizes (up to 4 GB  for  IA
       and  up	to  1 GB for PA-RISC).	Setting vps_chatr_ceiling to very high
       values (anything above 64 KB) should be done with extreme caution.   It
       can lead to excessive memory consumption and quickly deplete the amount
       of free memory available on the system.

   When Should the Value of This Tunable Be Lowered?
       This tunable should be lowered if no user  application  actually	 needs
       large  pages sized at the current tunable value, to minimize the chance
       of a mistaken or malicious  user	 causing  wasted  physical  frames  by
       requesting unnecessarily large page sizes.

   What Are the Side Effects of Lowering the Value?
       One  side  effect  is  that  applications  run with smaller page sizes.
       Also, the system uses smaller page sizes for certain system pages.

   What Other Tunables Should Be Changed at the Same Time?
       None.

WARNINGS
       All HP-UX kernel tunable parameters are release specific.  This parame‐
       ter  may	 be  removed or have its meaning changed in future releases of
       HP-UX.

       Installation of optional kernel software, from HP or other vendors, may
       cause  changes  to  tunable parameter values.  After installation, some
       tunable parameters may no longer be at the default or recommended  val‐
       ues.  For information about the effects of installation on tunable val‐
       ues, consult the documentation for the kernel software being installed.
       For  information	 about	optional  kernel  software  that  was  factory
       installed on your system, see at

AUTHOR
       was developed by HP.

SEE ALSO
       chatr(1).

			   Tunable Kernel Parameters	  vps_chatr_ceiling(5)
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