stensize(3G)stensize(3G)NAMEstensize - specify the number of bit planes desired to comprise the
stencil buffer
C SPECIFICATION
void stensize(long planes)
PARAMETERS
planes is the number of bit planes requested to be configured as
stencil planes. Only values 0 through 8 are accepted. The
default is 0.
DESCRIPTIONstensize specifies how many bit planes are requested to be configured as
stencil planes. The constraints on planes are machine dependent. Call
getgdesc(GD_BITS_STENCIL) to determine the maximum number of bit planes
available for stencil operation.
stensize takes effect only after gconfig has been called. The number of
bit planes granted for the stencil buffer may not be exactly what was
requested. Call getgconfig(GC_BITS_STENCIL) to determine how many bit
planes were configured as stencil buffer planes.
Because stencil bit planes are available only in the normal framebuffer,
stensize should be called only while draw mode is NORMALDRAW.
SEE ALSO
drawmode, gconfig, getgconfig, stencil, mssize
NOTES
This routine is available only in immediate mode.
IRIS-4D B, G, GT, and GTX models, as well as the Personal Iris, Indy,
Iris Indigo Entry, and XL, do not support stensize.
XS, XS24, XZ, Elan and Extreme systems support up to 4 stencil planes,
which are borrowed from the Z buffer. The resolution of the Z buffer
decreases when using stencil planes on Elan systems.
On the IRIS-4D RealityEngine models the stencil buffer and the stencil
component in the multisample buffer are independent. When the
multisample buffer is requested in the current framebuffer configuration,
it is recommended to call stensize(0), as no stencil buffer planes are
required.
BUGS
IRIS-4D VGX machines without the optional alpha bit planes allocate
stencil bit planes from the least-significant Z buffer bit planes. Z
buffer operation compensates for this allocation automatically, so the
programmer is aware of the allocation only when the Z buffer contents are
read back using lrectread. Use getgdesc to determine whether your
machine has alpha bit planes.
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